Laxmi N. Bhuyan

Dr. Laxmi N. Bhuyan

Distinguished Professor

Computer Science and Engineering

University of California, Riverside, CA 92521

Office: 351, Winston Chung Hall
Phone: (951) 827-2281
Fax: (951) 827-4643
Email: bhuyan@cs.ucr.edu

 

Short Biography:

Laxmi Narayan Bhuyan is Distinguished Professor of Computer Science and Engineering (CSE) Department at the University of California, Riverside (UCR). He was Chair of the CSE Department from 2007 to 2014. Prior to joining UCR in January 2001, he was a professor of Computer Science at Texas A&M University (1989-2000) and Program Director of the Computer System Architecture Program at the National Science Foundation (1998-2000). He has also worked as a consultant to Intel and HP Labs.

Dr. Bhuyan received his Ph.D. degree in Computer Engineering from Wayne State University in 1982. His current research interests are in the areas of network packet processing, multiprocessor architectures, heterogeneous architectures, parallel and distributed processing, and performance evaluation. He has published more than 200 papers in these areas in IEEE Transactions on Computers (TC), IEEE Transactions on Parallel and Distributed Systems (TPDS), Journal of Parallel and Distributed Computing (JPDC), and many refereed conference proceedings, like HPCA, ICS, MICRO, PACT, DAC, INFOCOM, and ANCS.

Dr. Bhuyan served as the Editor-in-Chief of the IEEE Transactions on Parallel and Distributed Systems (TPDS) from 2006 to 2009. He is a past Editor of the IEEE TC, JPDC, and Parallel Computing Journal. His professional activities are too numerous to describe. To mention a few, he was the founding Program Committee Chairman of the HPCA in 1995, Program Chair of the IPDPS in 1996, General Chair of HPCA-9 (2003), and General Chair of ICS in 2015. He was elected Chair of the IEEE Computer Society Technical Committee on Computer Architecture (TCCA) between1995-1998.

Dr. Bhuyan is a Fellow of the IEEE, a Fellow of the ACM, a Fellow of the AAAS (American Association for the Advancement of Science), and a Fellow of the WIF (World Innovation Foundation). He has also been named as an ISI Highly Cited Researcher in Computer Science. He is also a Fulbright Senior Specialist. He has received other awards such as Halliburton Professorship at Texas A&M University, and Senior Fellow of the Texas Engineering Experiment Station. He was also awarded the IEEE CS Outstanding Contribution Award in 1997. He was inducted into the Distinguished Alumni Hall of Fame of the Wayne State University College of Engineering in October 2010. He received the Distinguished Alumnus Award from National Institute of Technology, Rourkela in 2011.

My Ph.D. Family Tree

 

Education and Experience

Honors and Professional Activities

Research

Publications

 

CS 161 Lectures

CS 162 Lectures

CS 213 Lectures

CS 260 Lectures

CS 203A Lectures

 

Education:

Ph.D. Computer Engineering, Wayne State University, 1982
M.Sc. Electrical Engineering, REC, Rourkela, Sambalpur University, 1978
B.Sc. Electrical Engineering, REC, Rourkela, Sambalpur University, 1972

Experience:

Students Supervised:

·        Ph.D. Graduated

·        Current Ph.D. Students:

Awards:

Selected Professional Activities:

Current Research Interests and Areas of Expertise:

Current Projects:

·        National Science Foundation, Co-Principal Investigator, SHF: Locality Aware Scheduling in Multi-GPU Systems, Oct 2019 through Sept 2022.

·        National Science Foundation, Co-Principal Investigator, (PI: Daniel Wong) SHF: Small: Energy Saving in Heterogeneous Data Centers, Oct 2018 through Sept 2021.

Other Recent Projects:

Selected Publications:

·        Heterogeneous Computing

·       GreenMM: Energy-Efficient GPU Matrix MultiplicationThrough Undervolting, ACM International Conference on Supercomputing (ICS 19), June 2019 (with H, Zamani et al)

·       Juggler: A Dependency-Aware Task Based Execution Framework for GPUs, The 23rd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2018), (with Belviranli, M., Seyong, L., and Vetter, J.)

·       GreenLA: Green Linear Algebra Software for GPU-Accelerated Heterogeneous Computing, Supercomputing (SC), 2016 (with J. Chen, L. Tan, P. Wu, D. Tao, H. Li, X. Liang, S. Li, R. Ge and Z. Chen)

·       WIREFRAME: Supporting Data-dependent Parallelism through Dependency Graph Execution in GPUs, IEEE MICRO, October 2017 (with A. Abdolrashidi, D. Tripathy, M. Belviranli, and D. Wong)

·       Efficient Warp Execution in Presence of Divergence with Collaborative Context Collection, International Symposium on Microarchitecture, MICRO 2015 (with Farzad Khorasani and Rajiv Gupta)

·       Scalable SIMD-Efficient Graph Processing on GPUs, International Conference on Parallel Architectures and Compilation Techniques, PACT 2015 (with Farzad Khorasani and Rajiv Gupta)

·       PeerWave: Exploiting Wavefront Parallelism on GPUs with Peer-SM Synchronization, ACM International Conference on Supercomputing, ICS 2015 (with Mehmet Belviranli, Peng Deng, Rajiv Gupta and Qi Zhu)

·       CuSha: Vertex-Centric Graph Processing on GPUs, The ACM International Symposium on High-Performance Parallel and Distributed Computing, HPDC 2014 (with Farzad Khorasani, Keval Vora and Rajiv Gupta

·       A Dynamic Self Scheduling Scheme for Heterogeneous Multiprocessor Architectures, ACM Transactions on Architecture and Code Optimization, TACO January 2013 (with Mehmet Belviranli and Rajiv Gupta)

·        Multiprocessor/Data Center:

·       Goldilocks: Adaptive Resource Provisioning in Containerized Data Centers, International Conference on Distributed Computing Systems (ICDCS 19), July 2019, (with L. Zhou and K.K. Ramakrishnan)

·       µDPM: Dynamic Power Management for the Microsecond Era, 25th International Symposium on High-Performance Computer Architecture (HPCA19), Feb 2019 (with Chi-hsun Chou and Daniel Wong)

·       TailCut: Power Reduction under Quality and Latency Constraints in Distributed Search Systems, International Conference on Distributed Computing Systems (ICDCS), Atlanta, GA, June 2017 (with C. Chou and S. Ren)

·       DynSleep: Fine-Grained Power Management for a Latency-Critical Data Center Application, International Symposium on Low Power Electronics and Design (ISPLED), August 2016 (with C. Chou and D. Wong)

·       Tumbler: An Effective Load Balancing Technique for MultiCPU Multicore Systems, ACM Transactions on Architecture and Code Optimization (TACO), January 2015 (with K Pusukuri and R. Gupta)

·       Shuffling: A Framework for Lock Contention Aware Thread Scheduling for Multicore Multiprocessor Systems, International Conference on Parallel Architectures and Compilation Techniques, PACT 2014 (with K Pusukuri and R. Gupta)

·       ADAPT: A Framework for Coscheduling Multithreaded Programs, ACM Transactions on Architecture and Code Optimization (TACO),  January 2013 (with K Pusukuri and R. Gupta)

·       Maintaining Data Consistency in Structured P2P Systems, IEEE Transactions on Parallel and Distributed Systems (TPDS), Nov 2012 (with Yi Hu and Min Feng)

·       Thread Tranquilizer: Dynamically Reducing Performance Variation, ACM Transactions on Architecture and Code Optimization (TACO),  January 2012 (with K Pusukuri and R. Gupta)

·       No More Backstabbing... A Faithful Scheduling Policy for Multithreaded Programs, Parallel Architectures and Compilation Techniques (PACT), October 2011 (with K. Pusukuri, R. Gupta)

·        Network Packet Processing:

·        Network I/O Architectures: