University of California, Riverside
Department of Computer Science and Engineering
SystemC is the standard design and verification language
built in C++ that spans from concept to implementation in hardware and software.
As a standard, SystemC could possibly enable and accelerate the exchange of
system-level intellectual property (IP) models and executable specifications
using a common C-based modeling platform. (from
SystemC provides a single language to define hardware and software components, to facilitate hardware/software co-simulation, and to facilitate step-by-step refinement of a system design down to the register-transfer level for synthesis. (from textbook: "A SystemC Primer")