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Walid A. Najjar
is a Professor in the Department of
Computer Science and Engineering at the University
of California Riverside. His research interests are in the fields of
computer architecture and compiler optimizations, embedded systems and
sensor networks. Lately, he has been very active in the area of compilation
for FPGA-based code acceleration and reconfigurable computing. His research
has been supported by NSF, DARPA and various industry sponsors.
He received a B.E. in Electrical Engineering
from the American University of Beirut
in 1979 and the M.S. and Ph.D. in Computer Engineering from the University of Southern California in 1985
and 1988 respectively. He was on the faculty of the Department of Computer Science at Colorado State
University (1989 to 2000), before that he was with the USC-Information Sciences Institute.
He has served on the program committees for a
number of leading conferences in this area including CASES, ISSS-CODES,
DATE, HPCA, and MICRO. He is a Fellow of the IEEE.
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