EE 134: Digital Integrated Circuit Layout and Design

← 2015-16 2016-17 2025-26 →
← 2012-13 ← 2012-13 changes (lax) changes (strict) ▾ 2025-26 → 2025-26 →

Units: 4

Hours: Lecture, 3 hours; laboratory, 3 hours

Catalog page 253

Prerequisites: EE 100B, EE 120A/CS 120A, EE 133 (EE 100B, EE 120A/CS 120A, and EE 133 may be taken concurrently); or consent of instructor

Description: Covers integrated circuit design, layout, and verification of complementary metal oxide semiconductors (CMOSs) with use of computer-aided design tools. Topics covered include digital models, inverters, static logic gates, transmission gates, flip-flops, dynamic logic gates, memory circuits, and digital phase-locked loops.

Derived Information — The following is not part of the official catalog but is computed from catalog data.
Prerequisite graph not available.
Enrollment History (from UCR Banner, not catalog)
Year F W S Su Total
2025-26 26/50 26/50