Yang Zhao's Homepage

Email: ZHAOY(lowercase) [at] cs.ucr.edu
Office: Room 464, Engineering Building Unit II

Department of Computer Science & Engineering
University of California at Riverside

I come from Xi'an, Shaanxi, China. Now I am a second-year Ph.D student and working in Logic and Stochastic Verification Lab with Dr.Gianfranco Ciardo. My resume is available here.

Research

Multi-valued decision diagrams (MDD), asynchronous systems verification and testing
Symbolic model checking for asynchronous systems

These techniques are implemented in our tool SMART: the Stochastic Model checking Analyzer for Reliability and Timing

Yang Zhao and Gianfranco Ciardo, Symbolic CTL Model Checking of Asynchronous Systems Using Constrained Saturation, In Proc. 7th International Symposium on Automated Technology for Verification and Analysis (ATVA), LNCS 5799, pages 368-381. Macao, China, Oct. 2009. [PDF]

Ph.D Student (Sep. 2008 - now): Department of Computer Science & Engineering, University of California, Riverside, U.S.
M.S (Sep. 2005 - Jul. 2008): Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China
- Advisor: Prof. Xiaowei Li
- Research: Hardware verification, SAT and its applications in formal verification, coverage-driven test generation for RTL designs, previous publications
- Thesis: Formal Verification Techniques Based on Satisfiability
B.S (Sep. 2001 - Jul. 2005): Department of Electronics, Peking University, Beijing, China