#include "systemc.h"

SC_MODULE (testbench)
{
	//Note that we put our input ports from our model
	//as output ports and output ports as input ports.
	//This is because we want to write to the inputs
	//of the model to test different cases and read 
	//the outputs of the model to verify correctness
	sc_out<sc_logic> A_p,B_p,CIN_p;
	sc_in<sc_logic> SUM_p,COUT_p;

	//Declare a thread called "process" in the constructor
	//block of the testbench. A SC_THREAD has the ability to 
	//suspend itself using wait statements.
	SC_CTOR (testbench) 
	{
		SC_THREAD (process);
	}

	//Define the functionality of the "process" thread.
	void process()
	{
			//Case 1
			//Note to Assign a value to a port of type logic
			//you must use SC_LOGIC_1 or SC_LOGIC_0
			A_p = SC_LOGIC_0;
			B_p = SC_LOGIC_0;
			CIN_p = SC_LOGIC_0;
			wait (5, SC_NS);					//Allow signals to set
			assert ( SUM_p == SC_LOGIC_0 );		//The assert signal 
			assert ( COUT_p == SC_LOGIC_0 );    //checks the output
			wait (10, SC_NS);
			print();

			//Case 2
			A_p = SC_LOGIC_0;
			B_p = SC_LOGIC_0;
			CIN_p = SC_LOGIC_1;
			wait (5, SC_NS);
			assert ( SUM_p == SC_LOGIC_1  );
			assert ( COUT_p == SC_LOGIC_0 );
			wait (10, SC_NS);
			print();

			sc_stop();							//End Simulation

	}

	//Utility Function That Prints the Designs Inputs and Outputs
	void print()
	{
		cout << "At time " << sc_time_stamp() << "::";
		cout << "(a,b,carry_in): ";
		cout << A_p.read() << B_p.read() << CIN_p.read();
		cout << "  (sum,carry_out): " << SUM_p.read() << COUT_p.read() << endl;
	}

};