Assignemnt 4 - Power Analysis of two GCD Calculators.

Design Specification

In this assignment, you will design two version of a GCD calculator. The GCD, or greatest common divisor, of two integers is the largest integer that evenly divides both integers. The following image provides a black box view of the GCD calculator, defining its inputs and outputs.

Likewise, the following is the corresponding entity declaration for the ALU that you are required to use. 

entity GCD is
    port( rst    : in  STD_LOGIC;
          clk    : in  STD_LOGIC;
          input1 : in  UNSIGNED(7 downto 0);
          input2 : in  UNSIGNED(7 downto 0);
          start  : in  STD_LOGIC;
          output : out UNSIGNED(7 downto 0);
	  done   : out STD_LOGIC );
end GCD;

The main focus of this lab is to design two GCD calculators that use two different algorithms for computing the GCD and measure the power consumed by the two versions to determine which version is more efficient with regards to power.

The following is pseudocode for the two algorithms

Algorithm 1

GCD(int a, int b) {

    if ( b > a ) then
        return GCD(b,a)
    else if( b = 0 ) then
        return a
    else
        return GCD(b, a - b) 
}

Algorithm 2

GCD(int a, int b) {

    if ( b > a ) then
        return GCD(b,a)
    else if( b = 0 ) then
        return a
    else
        return GCD(b, a % b) 
}

The GCD calculator works as follows. When start is asserted, the GCD calculator will clear the done output and begin computing the GCD of the two inputs using the appropriate algorithm. When the calculation has completed, the GCD is outputted on output and done is asserted.

Both versions of the GCD must be designed at the FSMD level. In addition, in the Algorithm 2, the modulus command is used. However, when using UNSIGNED variables, the divide and modulus operations are not performed. Therefore, a divider must be used. Instead of requiring students to create theis own dividers, one will be provided to you.

Divider

The divider that you should use in your implementation of Algorithm 2 is provided in the file divder.vhd. This file contains a VHDL description of an 8-bit combinational diivder that is depicted below.

The following provides a brief description of the inputs and ouputs of the divider:

Testbenches

Because the two versions will have different running times for computing the GCD, you should create two different testbenches that test the same set of inputs but take into consideration the different running times. This may not make much sense immediately, but after looking at the simulations of the two designs it will become clear.

Assignment Requirements