| Instructor | Frank Vahid, (vahid@cs.ucr.edu). Office hours TBA, Bourns A207 |
|---|---|
| Lecture | TR 11:10-12:30, SPR 2361 |
| Lab | On your own time. |
| Textbooks |
Giovanni De Micheli, Synthesis and Optimization
of Digital Circuits. McGraw Hill, 1994,
ISBN:0-07-016333-2. Recommended: Armstrong and Gray, VHDL Design Representation and Synthesis, 2nd edition, Prentice Hall, ISBN: 0130216704 (OR some book covering synthesis from VHDL). Recommended software: Aldec VHDL simulator student edition. An easy to use yet powerful VHDL simulator written for windows.
|
| Prerequisite | CS/EE120B (Digital systems) |
| Final exam | TBA |
| Call # and units | 16369, 4 units. |
| Grade | Labs 30%, Homeworks 15%, Midterm/Quizzes 30%, Final 25% |