To understand and compare the speed of an instruction set simulator to a RT-level simulation, i.e., running under a VHDL simulator.

1. In the previous assignment you designed an 8051 emulator (a.k.a. instruction set simulator). In this assignment you will measure the time it takes to simulate the execution of a given program using your instruction set simulator and a VHDL simulator. In order to measure the time it takes to execute a given program you will need to make the following modifications to your emu8051 application: (group project)

When 0xAA is written to P3, stop simulation and exit emu8051.
Eliminate all outputs to screen.
Maintain a counter that counts the number of instructions your emulator has executed.
Use main.c and main.hex as your testbench program.
Using the unix "time" command, measure the time it takes to run your testbench under 8051emu, also record the number of instructions executed. Compute the execution speed of your simulator. (instructions/second)

Now, you have to simulate the testbench under a VHDL simulator (use Active-Vhdl):

Download convert.cc, compile it under unix and use it to convert the testbench hex file to generate ROM.vhd. The usage is "convert main1.hex".
Download the source files for the RT-level 8051. Click Here.
Time how long it takes to simulate the testbench up to the point where P3=0xAA.

2. From the SIA Roadmap, calculate or lookup the following for ASICs for the years 1999, 2006, and 2012 (individual project):

(a) number of transistors PER CHIP
(b) on-chip clock frequency
(c) NRE cost (see cost table)

4. Compare the pro's and con's of following verification methods (individual project):

(a) Simulation
(b) Emulation
(c) First silicon

Write a brief report summarizing your simulation time results and answers to the above three questions. Turnin the report, in class, by 1/21/99.