Prefix Length
In this lab you will first follow a tutorial on using the synopsys synthesis
tools. Then, you will describe, at FSMD level, an entity that will compute
the length of the prefix of two 16 bit binary strings. You may use the
tutorial material as a starting point for this lab.
Synthesis Tutorial
Assuming you know how to use Synopsys "vhdlan" and "vhdldbx", copy the
following files into some directory in your home directory:
Now, follow these step to synthesize the "DIST" design:
1. Analyze and Simulate "DIST.vhd" and "DIST_TB.vhd" to verify correctness.
2. Run "dc_shell".
3. Type "include DIST_syn.scr" and hit return. Wait for it to finish.
4. Open "DIST_GATE.vhd" and comment out the line that reads "type UNSIGNED..."
near the top of the file.
5. Scroll down to the end of the "DIST_GATE.vhd" and insert the following
configuration:
configuration CFG_DIST_SYN of DIST is
for SYN
end for;
end CFG_DIST_SYN;
6. Modify the configuration in "DIST_TB.vhd" to use "WORK.CFG_DIST_SYN".
7. Analyze and Simulate "DIST_GATE.vhd" and "DIST_TB.vhd" to verify
correctness.
Prefix Length Example
Given: x = "001101", y = "0010101"
Compute prefix: "001"
Compute length: 3
Demo Output
Write an appropriate testbench and demo your FSMD and gate level simulations to
your TA.
Turnin
After your demo, turnin your VHDL files. The TA (or grader) will check these
files for quality and assign you a grade. Please do not turnin the work
directory generated by Synopsys synthesis tools.
Last updated: 2/23/99