Memory Mapped IO
In tutorial 2 you interfaced the 8031 to the FPGA through 4 IO pins on port
number 1. However, this approach will not scale up since the 8031 has limited
IO pins and most of these are used for external memory access. In this lab, you
will interface the 8031 to the FPGA by using memory-mapped IO. The external
memory available to the 8031 is 32KB, but the address space of the 8031 is
64KB, hence, you can create as many as 32KB of unique virtual IO ports!
Description
You will be designing a simple peripheral device that will be implemented on
the FPGA. This device will have two (real or imaginary) 8-bit register and
will perform these tasks:
1. Continuously monitor the external memory bus of the 8031 for register 1's
address followed by a write signal and read the data from the data bus into
register 1.
2. Continuously monitor the external memory bus of the 8031 for register 2's
address followed by a read signal and put register 2's content on the data
bus.
3. Compute register2 = register1 + the 4-bit value from PC (tutorial 3).
You will be writing the software for the 8031 to perform these tasks:
1. Write to register1 the value "00010011".
2. Read and store the content of register2.
3. Send the upper 4-bits of stored value to the 7-seg LED (tutorial 2).
4. Wait a little.
5. Send the lower 4-bits of stored value to the 7-seg LED.
6. Repeat steps 2, 3, 4, 5 and 6.
Demo Output
To fully test your design, you should inject 16 different test vectors and
check for correct output on the 7-seg LED, here is what you should expect:
Inject "0000" - Blink 1, 3.
Inject "0001" - Blink 1, 4.
Inject "0010" - Blink 1, 5.
Inject "0011" - Blink 1, 6.
Inject "0100" - Blink 1, 7.
Inject "0101" - Blink 1, 8.
Inject "0110" - Blink 1, 9.
Inject "0111" - Blink 1, a.
Inject "1000" - Blink 1, b.
Inject "1001" - Blink 1, c.
Inject "1010" - Blink 1, d.
Inject "1011" - Blink 1, e.
Inject "1100" - Blink 1, f.
Inject "1101" - Blink 2, 0.
Inject "1110" - Blink 2, 1.
Inject "1111" - Blink 2, 2.
Solution
Here is the full solution to this assignment. Some or portions of the
solution may be available to you when the assignment is assigned. The full
solution will be made available after the assignment is due.
Turnin
After your demo, turnin your C, VHDL and constraint files. The TA (or grader)
will check these files for quality and assign you a grade. Please do not
turnin the entire directory generated by Xilinx Foundation Project Manager.
Last updated: 1/8/99