Following the steps outlined in lab2 , write a behavioral vhdl description of the BCD converter and simulate it.
1. You must now modify your schematic by replacing all of your input and output signals so that they may be mapped to the appropriate pins on the XS40 board. Replace all of the hirarchy connectors with "IPADS", which will then be connected to the "IBUF" symbols
2. Now you will have to map the pins on the board to these pads. To do this, select each pad and double click on it. This should bring up a window labeled "Symbol Properities." In this window type "LOC" into the "Name" box and the in the "Description" box type in the pin number ("p6" through "p9" depending on the pad), clicking the "Add" button and then "OK" each time. Do this for each input pad.
3. Follow the same steps for the output pads, but label the descriptions as follows:
4. Save this to a different file and return to the "Project Manager" (the original window that opened). Add this new file to the project.
5. Click on Implementation. This should bring up the "Implement Design" window. Click "Run" on this window.
6. If there are any errors, go back to the schematic and fix them, otherwise proceed.
7. Find the "bit" file that was created and copy it into your home drive.
8. Go to the designated computer and we will download and test out your design.
1. Open up your project under Xilinx. Make sure that the names of your variables match exactly with those on the web page (in1, in2, etc.).
2. Inside Windows explorer, remove the ".ucf" file in your project and replace it with lab3.ucf being sure to rename it to whatever ".ucf" file you deleted. For example, if your project was "lab02" you would remove "lab02.ucf" and save "lab3.ucf" as "lab02.ucf".
3. Now you can run through the Implementation stage and generate a bit file like before.
4. Check out an FPGA from your T.A., run the program "xsload" located in C:\xstools\bin on your bit file to download your program onto the board and then demo it to the T.A.
5. You must do this for both the structural and the behavioral description of the BCD to 7-segment display converter.