Homework 3
UCR EE/CS120B: Introduction to Embedded Systems
Fall Quarter 2002, Prof. Frank Vahid
Due Tuesday November 5 at the beginning of lecture 

1. Write assembly code, using the instruction set provided in ESD Fig 3.7,
   for the following:

   // assume x is M[4]
   // assume y is M[6]
   // assume z is M[9]

   if (x == y) {
      z = x;
   }
   else {
      z = y;
   }

2. Repeat problem 1 using the 8051 instruction set.

3. Design a 16-bit processor, having a Harvard architecture (separate
   program and data memory), able to support up to 32 instructions.
   It has 2K words of 16-bit wide data memory, 
   64K words of 16-bit wide program memory, 32 registers,
   and an accumulator.  It supports the following instructions:
      * A = M(direct)
      * M(direct) = A
      * Rn = A
      * A = Rn
      * A = immediate
      * A = A - Rn
      * Jump to PC+offset if A is 0 (offset up to +1024 or -1023)
      * Jump to PC+offset unconditionally
   (a) Define an instruction set using pneumonics. Also show the binary 
       representation of the instruction. 
       (i.e., do what was done in ESD Fig 3.7). Note
       that this is an accumulator-based machine -- the accumulator is
       involved in all memory transfers and arithmetic operations, and
       is implicit in those instructions. I.e., do NOT include a field
       for the accumulator.
   (b) Describe the processor as an FSMD, then create a datapath plus an 
       FSM, and finally implement a control unit having a controller that 
       uses a state-register plus ROM (show the ROM table that would 
       program the ROM, but don't draw the ROM internals). 
       
   When you complete this problem, you will have designed your first
   computer!

4. (a) Write an assembly program that uses your processor to compute 
   the following.  Assume w is M[8], x is M[9], y is M[10]. Assume you
   must update x and w in memory.

   while (w != 0)
   {
      x = x - y;
      w = w - 1;
   }

   (b) Translate the first 6 instructions of your program into binary.