Biography

I am a Ph.D. student in the Department of Computer Science and Engineering at the University of California at Riverside. My advisor is Professor Rajiv Gupta. My full CV and publications can be found here.

Research

My research interests are Compilers and Architectures for Parallel Systems and Software Tools for Debugging.

The SpiceC Parallel Programming System

I am currently working on the SpiceC Parallel Programming System. SpiceC is a system for parallel programming that simplifies the task of parallel programming through a combination of SpiceC directives and an intuitive computation model. To support various application types, the SpiceC directives allow programmers to express different forms of parallelism. Speculation is also supported to enable exploitation of dynamic parallelism. The SpiceC computation model offers software-managed memory isolation and data transfer between threads. Therefore, it can be adapted to a wide range of parallel architectures, including shared-memory systems (e.g., multicores and manycores), distributed-memory systems (e.g., clusters), and heterogeneous systems (e.g., GPGPUs).

Papers: [PLDI'12], [TACO/HiPEAC'12], [PPoPP'11a]

Speculative Parallelization

CorD is a software-based speculative parallelization approach. It is designed to automatically extract thread level parallelism from sequential programs for improving their performance on multicores. The fundamental component is a thread-based speculative execution model, called Copy or Discard (CorD).To support speculation, CorD achieves state separation by providing each speculative thread with its own space to store speculatively computed results. The results are either copied back to non-speculative state or discarded depending upon the occurrence of cross-iteration dependences. I carried out this research in collaboration with Chen Tian.

Papers: [PPoPP’11b], [PLDI’10], [ISMM’10], [IJPP’09], [MICRO’08]

Software Engineering: Matching and Debugging

In this area, I have developed dynamic analysis techniques that assist in improving software reliability. In particular, I have focused on two types of techniques: program matching and program debugging.

Papers: [PASTE'10], [ICSM'09], [ICPC'09]

Computer Architecture: Cache Replacement Policies

My work in computer architecture is to improve cache performance. I have developed two cache replacement policies. The first cache replacement policy makes the replacement decision based on the reuse information of the cache lines and the requested data. In the second cache replacement policy, I introduce the concept of phantom lines, which work like real cache lines in the LRU stack but do not hold any data or tag. By using appropriate number of phantom lines, the data blocks that show stronger locality can be kept longer in the cache.

Papers: [INTERACT’12], [TACO’11]