CS161
Design and Architecture of Computer Systems
Winter 2005

General Information

Class Meeting Time:	3:40- 5:00pm, MWF
Lecture Room:	OLMH 1133
Office Hours:	12:00-1:00, MF
Textbook:	John L. Hennessy and David A. Patterson,
	"Computer Organization and Design, The Hardware/Software Interface,"
	3rd Edition. Morgan Kaufmann Publishers, 2004.
Prerequisite:	CS120B OR EE120B
Moodle System:	http://fish.cs.ucr.edu/moodle/
TA's	San Nguyen (Wednesday)
	Responsibilities: help answer questions regarding lectures, homeworks, quizes etc.

Course Requirements:

Syllabus

• MIPS instruction set architecture (ISA);
• Performance measurement
• Processor data path design (single cycle vs. multi-cycle)
• Memory hierarchy (caches and memory)
• Pipeline

Class Schedule:

Announcements:

Homework:

• Refer to lecture 3 slides. Assigned 1/17, due 1/24 before class.
• Homework 2: Performace evaluation. Exercise 4.12 on page 274 (3rd. of the book). Assigned: 2/2/2006. Due: 2/9/2006, in class.
• Homework 3: Multicycle data path and control path: 5.36 on page 357. Assigned: 2/23. Due 3/2 in class.
• Homework 4: Cache: 7.10 on page 556. Deadline has passed. Answer can be found here

Policies:

• You are responsible for all material covered in lectures.
• You may discuss assignments with classmates, but the work you turn in must be your own. Cheating in homework, quizes, labs, and exams are absolutely prohibited. The minimum penalty for a violation of the regulations will be a zero for the assignment; the maximum penalty will be failure of the course.
• Examinations must be taken in class on the day they are given. There will be no exceptions.