LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.ALL;
USE ieee.std_logic_ARITH.ALL;
USE ieee.numeric_std.ALL;
 
ENTITY syncfsm_tb IS
END syncfsm_tb;
 
ARCHITECTURE behavior OF syncfsm_tb IS 
 
    -- Component Declaration for the Unit Under Test (UUT)
 
    COMPONENT syncfsm
    PORT(
         Clock : IN  std_logic;
         Reset : IN  std_logic;
         Enable : IN  std_logic;
         Output : OUT  std_logic;
         Valid : OUT  std_logic;
         Increment : OUT  std_logic;
         Overflow : OUT  std_logic;
         Count : OUT  std_logic_vector(31 downto 0)
        );
    END COMPONENT;
    
   --Inputs
   signal Clock : std_logic := '0';
   signal Reset : std_logic := '0';
   signal Enable : std_logic := '0';

 	--Outputs
   signal Output : std_logic;
   signal Valid : std_logic;
   signal Increment : std_logic;
   signal Overflow : std_logic;
   signal Count : std_logic_vector(31 downto 0);

   -- Clock period definitions
   constant Clock_period : time := 10 ns;
 
BEGIN
 
	-- Instantiate the Unit Under Test (UUT)
   uut: syncfsm PORT MAP (
          Clock => Clock,
          Reset => Reset,
          Enable => Enable,
          Output => Output,
          Valid => Valid,
          Increment => Increment,
          Overflow => Overflow,
          Count => Count
        );

   -- Clock process definitions
   Clock_process :process
   begin
		Clock <= '0';
		wait for Clock_period/2;
		Clock <= '1';
		wait for Clock_period/2;
   end process;
 

   -- Stimulus process
   stim_proc: process
   begin		
      -- hold reset state for 100 ns.
      Reset <= '1';
      Enable <= '0';
      wait for 10 ns;	

      -- insert stimulus here

		--Error Set 1
      Reset <= '1';
      Enable <= '1';
		wait for Clock_period;
		--Error 1.0
		Assert (Output = '0')
			Report "Error 1.0: Failed Output at Reset." 
			Severity ERROR;
		--Error 1.1
		Assert (Valid = '0')
			Report "Error 1.1: Failed Valid at Reset." 
			Severity ERROR;
		--Error 1.2
		Assert (Increment = '1')
			Report "Error 1.2: Failed Increment at Reset." 
			Severity ERROR;
		--Error 1.3
		--Assert (Overflow = '0')
		--	Report "Error 1.3: Failed Count at Reset." 
		--	Severity ERROR;
		--Error 1.4
		Assert (Count = X"00000000")
			Report "Error 1.4: Failed Count at Reset." 
			Severity ERROR;

		--Error Set 2
	   Reset <= '0';
      Enable <= '1';
		FOR count_check IN 1 TO 191 LOOP
		wait for Clock_period;
			--Error 2.0
			Assert (Output = '0')
				Report "Error 2.0: Failed Output at State_0." 
				Severity ERROR;
			--Error 2.1
			Assert (Valid = '0')
				Report "Error 2.1: Failed Valid at State_0." 
				Severity ERROR;
			--Error 2.2
			Assert (Increment = '0')
				Report "Error 2.2: Failed Increment at State_0." 
				Severity ERROR;
			--Error 2.3
			--Assert (Overflow = '0')
			--	Report "Error 2.3: Failed Overflow at State_0." 
			--	Severity ERROR;
			--Error 2.4
			Assert (Count = X"00000000")
				Report "Error 2.4: Failed Count at State_0." 
				Severity ERROR;
		END LOOP;
		
		--Error Set 3
		FOR count_check IN 0 TO 95 LOOP
			wait for Clock_period;
			--Error 3.0
			Assert (Output = '1')
				Report "Error 3.0: Failed Output at State_1." 
				Severity ERROR;
			--Error 3.1
			Assert (Valid = '0')
				Report "Error 3.1: Failed Valid at State_1." 
				Severity ERROR;
			--Error 3.2
			Assert (Increment = '0')
				Report "Error 3.2: Failed Increment at State_1." 
				Severity ERROR;
			--Error 3.3
			--Assert (Overflow = '0')
			--	Report "Error 3.3: Failed Overflow at State_1." 
			--	Severity ERROR;
			--Error 3.4
			Assert (Count = X"00000000")
				Report "Error 3.4: Failed Count at State_1." 
				Severity ERROR;
		END LOOP;	

		--Error Set 4
		FOR count_check IN 0 TO 1279 LOOP
		wait for Clock_period;
			--Error 4.0
			Assert (Output = '1')
				Report "Error 4.0: Failed Output at State_2." 
				Severity ERROR;
			--Error 4.1
			Assert (Valid = '1')
				Report "Error 4.1: Failed Valid at State_2." 
				Severity ERROR;
			--Error 4.2
			Assert (Increment = '0')
				Report "Error 4.2: Failed Increment at State_2." 
				Severity ERROR;
			--Error 4.3
			--Assert (Overflow = '0')
			--	Report "Error 4.3: Failed Overflow at State_2." 
			--	Severity ERROR;
			--Error 4.4
			Assert (Count = conv_std_logic_vector(count_check,32))
				Report "Error 4.4: Failed Count at State_2." 
				Severity ERROR;
		END LOOP;		

		--Error Set 5
		FOR count_check IN 0 TO 30 LOOP
			wait for Clock_period;
			--Error 5.0
			Assert (Output = '1')
				Report "Error 5.0: Failed Output at State_3." 
				Severity ERROR;
			--Error 5.1
			Assert (Valid = '0')
				Report "Error 5.1: Failed Valid at State_3." 
				Severity ERROR;
			--Error 5.2
			Assert (Increment = '0')
				Report "Error 5.2: Failed Increment at State_3." 
				Severity ERROR;
			--Error 5.3
			--Assert (Overflow = '0')
			--	Report "Error 5.3: Failed Overflow at State_3." 
			--	Severity ERROR;
			--Error 5.4
			Assert (Count = X"00000000")
				Report "Error 5.4: Failed Count at State_3." 
				Severity ERROR;
		END LOOP;
	--Systems runs for (10ns)*(?) = ? ns
	Report "Completed Testbench." Severity NOTE; 		--Report testbench complete.
   wait;
   end process;

END;