UCR CS269: Hardware/Software Engineering of Embedded Systems

Course Information Class Readings and Presentations Individual Projects

CS269 deals with the exciting and rapidly-growing field of embedded computing systems.  The course will present state-of-the-art software and hardware design techniques for embedded computing systems.  Topics include specification models, languages, simulation, partitioning algorithms, estimation methods, model refinement, and design methodology.  

Course information

Instructor	Harry Hsieh, (harry@cs.ucr.edu), EBU2 Room 339 Office hours: Tue/Thu 10-11AM, or by appointment
Class meeting	TR 12:40PM-2PM;  EBU2 Room 315
Textbooks	None -- all readings will be available online
Prerequisite	CS/EE120A(Digital systems) and consent of instructor
Call # and units	12369, 4 units.
Grade	Class Presentation & Participation  60%, Attendance 25%, Quiz 15% You are expected to read assigned readings before the date they are presented, to attend classes and actively participate in discussions.  You are also expected to present several papers during the quarter, for which you should study thoroughly, and do outside research as necessary. The presentation slides are provided for you, so your main concern is to understand the material, and can talk about them in convincing fashion.  You are of course welcome to make additional slides if you find the author's slide insufficient. In either case, you are completely responsible for the slide and the material. Excuses such as “I don’t know why they put that on the slide.” or “I have no idea what they do.” are not acceptable. The correct approach is to form sufficient intuition about the material to give your own interpretation and conjecture on what was done and what should be done. The papers will primarily be drawn from two of the premier conferences in the area Design Automation Conference www.dac.com and International Conference on Computer Aided Design www.iccad.com. A list of paper that is “relevant” to the main focus of the course will be chosen, but you are free to choose other papers (6 pages or more) from the past 3 years (2006, 2005, 2004) of the conference. Other “sister” conferences (www.date-conference.com, www.iccd-conference.com) may also have papers that interest you. However, you will most likely need to make your own presentation slides and/or obtain them directly from the authors. For those of you who have publications in these four conferences in the past 3 years, feel free to present your own papers. In all cases, you should finalize your paper choices by the second week of the course. Simple quizzes are planned throughout the quarter. The material on the quiz is designed to test whether or not you pay attention during the presentation and discussions. Attendance will be taken throughout.  Un-excused absence will be penalized.

Class Readings and Presentation

Date	Presenter	Topic and assigned reading	Presentation
Tu 4/3		Course Introduction and Logistics	pdf_6 pdf_2
Th 14/5		No Class Meeting
Tu 4/10	Eric Cheung Aaron Cloyd	Buffer Memory Optimization for Video Codec Application Modeled in Simulink Exploiting Forwarding to Improve Data Bandwidth of Instruction-Set Extensions Paper selection due
Thu 4/12	Daniel Orkin Jian Cui	Automatic Generation of Equivalent Architecture Model from Functional Specification Structural Search for RTL with Predicate Learning
Tu 4/18	Charles Hui Quiz 1	An Integrated Harware Software Approach for Run-Time Scratchpad-Management
Th 4/20		No Class Meeting
Tu 4/25	Eric Cheung Aaron Cloyd	Exploring Tradeoffs in Buffer Requirements and Throughput Constraints for Synchronous Dataflow Graphs A Real Time Budgeting Method for Module-Level-Pipelined Bus Based System using Bus Scenarios
Th 4/27	Daniel Orkin Jian Cui	Code Restructuring for Improving Cache Performance of MPSoCs RTL Simplification by Boolean and Interval Arithmetic Reasoning
Tu 5/2	Charles Hui Quiz 2	Memory Access Optimization Through Combined Code Scheduling, Memory Allocation, and Array Binding in Embedded System Design
Th 5/4		No Class Meeting
Tu 5/9	Eric Cheung Aaron Cloyd	Efficient Scalable and Flexible Data Transfer Architecture for Multiprocessor SoC with Massive Distributed Memory A Multiprocessor System-on-Chip for Real-Time Biomedical Monitoring and Analysis: Architectural Design Space Exploration
Th 5/11	Daniel Orkin Jian Cui	DynamoSim: A Trace-based Dynamic Compiled Instruction Set Simulator Improvements to Combinational Equivalence Checking
Tu 5/16	Charles Hui Quiz 3	Design Space Exploration and Prototyping for On-Chip Multimedia Applications
Th 5/18		To Be Announced
Tu 5/23	Eric Cheung Aaron Cloyd	Approximate VCCs A New Characterization of Multimedia Workloads for System-level MpSoC Design
Th 5/25	Daniel Orkin Jian Cui	Fast Timing Closure by Interconnect Criticality Driven Delay Relaxation
Tu 5/30	Charles Hui Quiz 4	Efficient Equivalence Checking with Partitions and Hierarchical Cut-Points
Th 6/1		To Be Announced
Tu 6/6		To Be Announced
Th 6/8		To Be Announced

List of papers:

Paper and slides can be found at www.dac.com or www.iccad.com

System Level Platform and Specification

paper slides DAC04: An Efficient Scalable and Flexible Data Transfer Architecture for Multiprocessor SoC with Massive Distributed Memory
paper slides DAC04: An Integrated Harware Software Approach for Run-Time Scratchpad-Management
paper slides DAC05: Approximate VCCs A New Characterization of Multimedia Workloads for System-level MpSoC Design
paper slides DAC06: A Real Time Budgeting Method for Module-Level-Pipelined Bus Based System using Bus Scenarios
 

System Level Exploration and Synthesis

 
paper slides DAC04: Retargetable Profiling for Rapid, Early System Level Design Space Exploration
paper slides DAC04: Automatic Generation of Equivalent Architecture Model from Functional Specification
paper slides DAC05: Memory Access Optimization Through Combined Code Scheduling, Memory Allocation, and Array Binding in Embedded System Design
paper slides DAC06: Exploiting Forwarding to Improve Data Bandwidth of Instruction-Set Extensions
paper slides DAC06: Design Space Exploration and Prototyping for On-Chip Multimedia Applications
paper slides DAC06: Buffer Memory Optimization for Video Codec Application Modeled in Simulink
paper slides DAC06: Exploring Tradeoffs in Buffer Requirements and Throughput Constraints for Synchronous Dataflow Graphs
paper slides DAC06: A Multiprocessor System-on-Chip for Real-Time Biomedical Monitoring and Analysis: Architectural Design Space Exploration
paper slides ICCAD04: Application-Specific Buffer Space Allocation for Networks-on-Chip Router Design
paper slides ICCAD05: Code Restructuring for Improving Cache Performance of MPSoCs
paper slides ICCAD05: RTL Simplification by Boolean and Interval Arithmetic Reasoning
paper slides ICCAD05: Fast Timing Closure by Interconnect Criticality Driven Delay Relaxation

System Level Verification

paper slides DAC04: High Level Cache Simulation for Heterogeneous Multiprocessors-slides
paper slides DAC04: Efficient Equivalence Checking with Partitions and Hierarchical Cut-Points
paper slides DAC05: Structural Search for RTL with Predicate Learning
paper slides DAC06: Guiding Simulation with Increasingly Refined Abstract Traces
paper slides ICCAD04: DynamoSim: A Trace-based Dynamic Compiled Instruction Set Simulator
paper slides ICCAD06: Improvements to Combinational Equivalence Checking