SUPERLOG code fragment
•Module FSM4(input logic serial, clock, reset);
•State {S0, S1, S2 } currentState;
•Always_ff @ (postdge clock iff !reset)
• transition (currentState)
• S0: if (serial ==1 ) ->> S2;
• S2: if (serial ==0 ) ->> S1;
• else ->>S0;
• S1: ->> S0  n = find(“a”, root);
• endtransition
•Endmodule
Typedef struct {string s; ref node left, right; } node;
//global data
Ref node n, root; //pointers to nodes
Int visited = 0;
Function ref node find( string str, ref node parent);
    if (parent == null) return null;
     visited ++;
    if (str == parent -> s) return parent;     if (str == parent -> s) return find( str, parent -> left);     if (str == parent -> s) return find( str, parent -> right);
endfunction