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CS269: HW/SW Engineering of Embedded Systems, Winter02
System Level Design is next…
abstract
Transistor Model
Capacity Load
Right Arrow: 1970’s
1970’s
cluster
abstract
Gate Level Model
Capacity Load
Right Arrow: 1980’s
1980’s
RTL
cluster
abstract
HDL
Wire Load
1990’s
Year 2000 +
IP Blocks
cluster
abstract
IP Block and Processor Model
Inter Block Communication  Model
RTL
Clusters
SW
Models
Getting back to this next level of abstraction, a large portion of the embedded market  will go  up to the next level of abstraction, that of designing with IP and programmable cores.  In fact, they already have, and will continue to do so.