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CS269: HW/SW Engineering of Embedded Systems, Winter02
Co-Design Methodology
Architecture
Libraries
Capture
Architecture
Verify
Architecture
Behavioral
Libraries
Capture
Behavior
Verify
Behavior
Map Behavior to
Architecture
Verify
Performance
Link to
HW/SW
Implementation
Performance
Back-Annotation
A designer designing in Polis will first capture the behavior they want.

Independently, the architecture is constructed and characterized.

The designer then go in and mapped behavior onto architecture and only at this time can he verified the performance.  If he likes the performance he sees, he can go down to automatic synthesis, and then the synthesis result can be back annotated for further analysis.