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Harry Hsieh |
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Department of Computer Science and Engineering |
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University of California at Riverside |
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Class Meeting |
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SURGE 349 |
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TuTh 12:40PM-2PM |
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Prerequisite: |
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CS/EE 120A |
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consent of instructor |
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Course number: |
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16546 |
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4 units, grades only |
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No S/NC, P/NP,… |
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Harry Hsieh |
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www.cs.ucr.edu/~harry |
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harry@cs.ucr.edu |
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Office (787-2030) |
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SURGE 329, TuTh 2PM-3PM |
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Check www for cancellation |
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Also available |
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by appointment |
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immediately after class |
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Class Web Page |
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www.cs.ucr.edu/~harry/classes_files/cs269_Win02.html |
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Presentations & participation 45% |
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Present 3-4 technical papers per quarter |
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1.5-2 hour-long lecture per quarter |
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Read 3 technical papers per week on the average |
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Attend every class meeting |
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Sign up for 1st round of presentation
by Thursday, 1/10 !!! |
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Individual project 45% |
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List of projects provided |
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1-2 person per project team |
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Sign up by Thursday, 1/17 !!! |
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Quiz 10% |
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In-class |
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Open-everything |
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No human help whatsoever… |
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No homework, no exams, no texbook, no laboratory
exercise, no |
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In the past: |
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Hardware and software design technologies were
very different |
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Recent maturation of synthesis enables a unified
view of hardware and software |
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Hardware/software “codesign” |
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The entire system must be designed as a whole |
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Hardware |
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Software |
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Interface |
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Memory |
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Peripheral |
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… |
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Change architecture |
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Change partitioning |
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Change scheduling |
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Change synthesis |
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Specify everything as ASIC |
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Offload as much as possible to processor |
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As long as timing constraints are met |
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Specify everything as software |
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If timing constraints are violated |
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Move functionality to hardware |
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System level partitioning |
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Implementations on different resources are
proceed independently |
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“System Integration” at the end |
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Lack of unified system behavior representation |
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Can’t verify the entire system |
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Lead to possible incompatibility across boundary |
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A priori division into resources |
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Can’t optimize across boundary |
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Lead to suboptimal design |
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Lack of well defined design flow |
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Can’t revise easily |
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Directly impact time to market |
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How to specify? |
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Languages and models |
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VHDL, C, Java, FSM, PN, Matlab,… |
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Framework (IDE) |
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Approaches to complex embedded systems |
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Design Reuse |
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Time to market push |
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High level of abstraction |
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Exploit all possible design freedom |
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Concurrency |
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Application concurrency matching architectural
concurrency |
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Heterogeneity |
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Automotive: block
based/multi-CPU/safety/deadline |
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Wireless: sequential
program/single-CPU/QoS/protocol |
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Goal: develop a formal design environment |
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Orthogonalize concerns |
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Computation vs communication (synthesized vs
translated) |
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Function vs architecture (should vs could) |
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Behavior vs performance (abstract vs
implemented) |
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Behavior vs constraints (abstract vs required) |
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Have theoretical foundation |
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Metamodel to represent different models of
computation |
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Model vs language… |
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Use Platform |
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Software, hardware, system |
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With its implied communication structure |
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Participants: |
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UC Berkeley (USA): methodologies, modeling, formal
methods |
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CMU (USA): formal methods |
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Politecnico di Torino (Italy): modeling, formal
methods |
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Universita Politecnica de Catalunya (Spain): modeling,
formal methods |
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Cadence Berkeley Labs (USA): methodologies, modeling,
formal methods |
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Philips (Netherlands): methodologies
(multi-media) |
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Nokia (USA, Finland): methodologies (wireless
communication) |
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BWRC (USA): methodologies (wireless
communication) |
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BMW (USA): methodologies (fault-tolerant
automotive controls) |
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Intel (USA): methodologies (microprocessors) |
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UC Riverside? |
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Balance between reusability and optimality |
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orthogonalize
design concerns as much as possible |
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optimize
the final implementation as much as necessary |
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Functional decomposition |
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Behavior adaptation |
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Media and MoC wrapper insertion |
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Communication refinement |
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Optimization |
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Architecture: abstracted layers for smooth
refinement |
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Sentential logic |
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p, q |
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p ^q, pvq, -p, p->q |
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Linear Temporal Logic |
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Time is linear sequence of points |
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Gp: globally p |
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Fp: eventually p |
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Xp: next p |
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pUq: p until q |
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Example: |
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Gp->Fp |
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What’s always true is eventually true |
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Object orientation is here to stay |
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C++ is yesterday’s news |
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What about inefficiency with interpreter? |
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Technology solution |
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Can always translate and compile |
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http://java.sun.com |
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Official site, contain tutorial |
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May declare fields and functions |
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May be
extended to define other processes |
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Object orientation a la Java and C++ |
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Fields and functions are private unless declared
public |
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Contain at least on constructor and a thread
function |
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Interact with other object through port |
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Port |
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Special field of type interface |
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Interface |
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Declare function with input/output type without
implementing them |
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Process access port through calling interface
functions |
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Update |
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Function may change the state of media that
implements the interface |
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Eval |
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Function may NOT change the state of the media… |
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Implements interfaces by providing code for the
function of the interfaces |
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May define fields and functions |
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The only construct in metamodel for
synchronization |
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Implement critical sections |
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Await ( guard ; test list; set list){critical
section} |
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Guard: condition that must hold for execution to
continue |
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Test list: other process should not have set
these |
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Set list: other process can not set theses now |
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Nondeterminism |
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Await{ ( g1 ; t1 ; s1 ) c1 , ( g2 ; t2 ; s2 )
c2…} |
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Notes