lTensilica Instruction Extension is a language that lets designers incorporate application-specific functionality
in the processor by adding new
instructions.
lTIE lets designer specify the mnemonic, the encoding, and semantics of single cycle instructions.
lDesigner can also use TIE to declare new processor state (state register).
lInstructions with similar operands can be grouped into classes, which can contain one or more instructions.
lThe semantics of an instruction are described using a subset of Verilog.