nSLDL: System
Level Design Languages
nHw only
designs?
•Today designs are at the RTL level
•However, it is slow and complex to simulate
larger designs in RTL
•Event based simulation of billion
gates??
nSystem-on-Chip(SoC)
designs
•SoCs designs are combinations of hw and
sw
•If continued with today’s tools, SoC designers will have to
struggle with combining hw & sw IPs from various
sources described in various incompatible languages