UCR CS220: Synthesis of Digital Systems

  Course Information     Lecture Topics  Homework   Individual Projects  

CS220 covers the synthesis and simulation of digital systems. Topics include synthesis at the system, behavioral, register-transfer, and logic levels; application-specific processors; simulation; and emerging system-on-a-chip design methodologies.

Course information

Instructor

Harry Hsieh, (harry@cs.ucr.edu), SURGE 329

Office hours: Tue Wed 11:00am-Noon, or by appointment

Class meeting

SPR 2212, TR 9:40AM-11AM

Textbooks

Recommanded:
Giovanni De Micheli, Synthesis and Optimization of Digital Circuits. McGraw Hill, 1994, ISBN:0-07-016333-2
Hassoun and Sasao editors, Logic Synthesis and Verification, Kluwer Academic Publishers, 2002 . ISBN:0-7923-7606-4

Additional reading will be distributed throughout the quarter.

Prerequisite

CS/EE120B(Digital systems), CS141, CS161, and consent of instructor

Call # and units

12449, 4 units.

Grade

Examinations 60%, Presentation/(optional)Project 25%, Homework 15%

Each  student will do 3 individual paper presentations and each presentation will last about 25 minutes. 
A list of paper will be available by the third week of the course. 

An optional individual project may be possible. 
For the student choosing the project option, one paper presentaitonand one project presentation are required.
Project should be decided by the third week of the course.

Letter grades are assigned according to the usual 85/70/60/50 rule:  85% and above correspond to an A, 70% and above to a B, 60% and above to a C, 50% and above to a D, and less than 50% to an F.  +/- grades will be given.  Curving may be done on individual items only if it helps the class.  You are NOT competing against one another -- you can all earn A's  (and that has happened in the past), so work together and help each other to succeed.

 

Lecture Topics

Date

Topic

Required Reading

Lecture notes

Tu 3/29

Introduction to microelectronics and synthesis

De Micheli, chapter 1

pdf_6 pdf_2

Th 3/31

Background: graphs, optimization

De Micheli, chapter 2

pdf_6 pdf_2

Tu 4/5

Hardware Modeling

De Micheli, chapter 3

pdf_6 pdf_2

Thu 4/7

 

 

pdf_6 pdf_2

Tu 4/12

Architectural Synthesis

De Micheli, chapter 4

pdf_6 pdf_2

Th 4/14

 

 

pdf_6 pdf_2

Tu 4/19

Scheduling Algorithm
Homework #1 due

De Micheli, chapter 5

pdf_6 pdf_2

Th 4/21

Resource Sharing and Binding

De Micheli, chapter 6

pdf_6 pdf_2

Tu 4/26

Two-Level Combinational Logic Optimization
Homework #2 due

De Micheli, chapter 7

pdf_6 pdf_2

Th 4/28

Midterm Review

 

none

Tu 5/3

Midterm Examination

 

Formula

Th 5/5

Two-Level Combinational Logic Optimization

De Micheli, chapter 7

pdf_6 pdf_2

Tu 5/10

Two-Level Combinational Logic Optimization

De Micheli, chapter 7

pdf_6 pdf_2

Th 5/12

Multiple-Level Combinational Logic Optimization

De Micheli, chapter 8

pdf_6 pdf_2

Tu 5/17

Multiple-Level Combinational Logic Optimization
Homewoork #3 due

De Micheli, chapter 8

pdf_6 pdf_2

Th 5/19

Multiple-Level Combinational Logic Optimization

De Micheli, chapter 8

pdf_6 pdf_2

Tu 5/24

Logic Synthesis for Low Power (Hassoun)
(Presented by Richard McHard)
Static Timing Analysis (Hassoun)
(Presented by Richard McHard)

 

pdf_6 pdf_2
pdf_6 pdf_2

Th 5/26

Sequential Logic Optimization
Cell-Library Binding
Logical and Physical Design: A Flow Perspective (Hassoun)
(presented by Xi Chen)
SPARKS papers 1 2
(presented by Xi Chen)
Homework #4 due Mondy 5/30 at noon.

De Micheli, chapter 9
De Micheli, chapter 10

pdf_6 pdf_2
pdf_6 pdf_2
pdf_6 pdf_2

Tu 5/31

Project Presentation

 

 

Th 6/2

Final Examination

 

Formula 2


Other topics include Tensilica and SystemC

Homeworks

  • Homework 1 due 4/19 at 9:30AM, electronically
  • Homework 2 due Wednesday 4/27 at 9:30AM, electronically
  • Homework 3 part1 part 2 due Tuesday 5/17 at 9:30AM electronically (Problem 1-6 ONLY)
  • Homework 4 due Monday 5/30 at noon, electronically

Individual Projects

Project are done individually and are optional.  You are will only have to do one presentation (hopefully on the topic related to your project), and one project presentation at the end.  All projects are proposed (by you or me) and determined by third week.  Any topic that falls within the confine of the course will do.  I expect to meet with you once a week in my office throughout the quarter to discuss your progress on the project.  The idea is that the result of the project, possibly with one more quarter of independent study, will have enough technical content for a conference or workshop publication.