Patents

1. US Patent 6,848,100.
   Hierarchical Software Path Profiling.
   Inventors: Y. Wu, A. Adl-Tabatabai, D. Berson, J.Z. Fang, and R. Gupta.
   Assignee: Intel Corporation.
   January 2005.
   
   
2. US Patent 6,044,221.
   Optimizing Code Based On Resource Sensitive Hoisting and Sinking.
   Inventors: R. Gupta, D. Berson, and J.Z. Fang.
   Assignee: Intel Corporation.
   March 2000.
   
   
3. US Patent 5,999,736.
   Optimizing Code by Exploiting Speculation and Predication with a
   Cost-Benefit Data Flow Analysis Based on Path Profiling Information.
   Inventors: R. Gupta, D. Berson, and J.Z. Fang.
   Assignee: Intel Corporation.
   December 1999.
   
   
4. US Patent 5,802,374.
   Synchronizing Parallel Processors using Barriers Extending Over Specific
   Multiple-Instruction Regions in Each Instruction Stream.
   Inventors: R. Gupta and M. Epstein.
   Assignee: Philips Electronics.
   September 1998.
   
   
5. US Patent 5,787,272.
   Method and Apparatus for Improving Synchronization Time in a
   Parallel Processing System.
   Inventors: R. Gupta and M. Epstein.
   Assignee: Philips Electronics.
   July 1998.
   
   
6. US Patent 5,317,734.
   Method of Synchronizing Parallel Processors Employing Channels and
   Compiling Method Minimizing Cross-Processor Data Dependencies.
   Inventor: R. Gupta.
   Assignee: Philips Electronics.
   May 1994.
   
   
7. US Patent 5,303,377.
   Method for Compiling Computer Instructions for Increasing Instruction Cache Efficiency.
   Inventors: R. Gupta and C-H. Chi.
   Assignee: Philips Electronics.
   April 1994.
   
   
8. US Patent 5,127,092.
   Apparatus and Method for Collective Branching in a Multiple Instruction Stream
   Multiprocessor where any of the Parallel Processors is Scheduled to
   Evaluate the Branching Condition.
   Inventors: R. Gupta and M. Epstein.
   Assignee: Philips Electronics.
   June 1992.