Guangdeng Liao

[Education | Research Interests | Publications | Patents | Industry Experience | CV | Courses | Professional Activities | Technical Skills | Life-of-packet] | Personal]

Short Biography:

I am a research scientist at Intel Labs, USA. I focus on designing an energy-effcient and cost-effective building box including both hardware and system software for large scaled data centers. I got my Ph.D degree from Department of Computer Science & Engineering at the University of California, Riverside . I worked under the supervision of Prof Laxmi Bhuyan on some interesting projects in computer architecture and networking. Prior to this, I graduated from Shanghai Jiaotong University with BS and MS degrees of Computer Science and Engineering.

My Ph.D research focus is on understanding the influence of high bandwidth network I/O processing on servers and optimizing its processing and power efficiency. It consists of re-architecturing CPU (e.g. cores, caches) and NIC designs, optimizing operating systems/virtualized systems and improving application level scheduling.

My CV can be downloaded here

Education 

• 2006-2011 Ph.D in Computer Science, University of California, Riverside.

• 2003-2006 Master of Science in Computer Science, Shanghai Jiaotong University.

• 1999-2003 Bachelor of Science in Computer Science, Shanghai Jiaotong University.

---

Research Interests 

• Computer I/O architecture

• Operating systems and Virtualized systems
• High Speed Ethernet Network
• Multi-core Scheduling

---

Publications 

• Guangdeng Liao, Laxmi Bhuyan,"Analyzing Performance and Power Efficiency of Network Processing over 10GbE", to appear in Journal of Parallel and Distributed Computing(JPDC), 2012.

• Yaozu Dong, Xiaowei Yang, Jianhui Li, Guangdeng Liao, Kun Tian, Haibing Guan,"High Performance Network Virtualization with SR-IOV", to appear in Journal of Parallel and Distributed Computing(JPDC), 2012.

• Guangdeng Liao, Steve McGowan, Theodore Willke, John Howard, Phil Cayton,"Efficient Block-level Sharing of Disaggregated Storage for Microservers", to appear in the first Workshop on Architecture and Application Exploration of Micro-Server Systems, HPCA 2012.

• Hai Wang, Sheldon Tan, Guangdeng Liao, Rafael Quintanilla, Ashish Gupta, "Full-Chip Runtime Error-Tolerant Thermal Estimation and Prediction for Practical Thermal Management", to appear in 2011 International Conference on Computer-Aided Design (ICCAD), 2011.

• Yaozu Dong, Dongxiao Xu, Yang Zhang, Guangdeng Liao, "Optimizing Network Virtualization with Virtual Interrupt Coalescing and Receive Side Scaling", to appear in IEEE Cluster 2011(Cluster), 2011.

• Guangdeng Liao, Xia Zhu, Laxmi N. Bhuyan "A New Server I/O Architecture for High Speed Networks.", in 17th High Performance Computer Architecture (HPCA), 2011. Paper

• Guangdeng Liao, Laxmi N. Bhuyan, Wei Wu, Heeyeol Yu, Steve R. King, "A New TCB Cache to Efficiently Manage TCP Sessions for Web Servers.", 6th ACM/IEEE Symposium on Architecture for Networking and Communication Systems (ANCS), La Jolla, CA, 2010. Paper

• Guangdeng Liao, Xia Zhu, Steen Larsen, Laxmi N. Bhuyan and Ram. Huggahalli, "Understanding Power Efficiency of TCP/IP Packet Processing over 10GbE", 18th Symposium on High-Performance Interconnects(HOTI), Mountain View, CA, 2010. Paper

• Guangdeng Liao, Heeyeol Yu and Laxmi N. Bhuyan, "A New IP Lookup Cache for High Performance IP Routers", in 47th Design Automation Conference (DAC), CA, 2010. Best Paper Candidate. Paper

• Guangdeng Liao, Laxmi N. Bhuyan, Danhua Guo, and Steve R. King, "EINIC: An Architecture for High Bandwidth Network I/O on Multi-Core Processors", 5th ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Princeton, NJ, 2009 Paper

• Danhua Guo, Guangdeng Liao Laxmi N. Bhuyan and Bin Liu, " An Adaptive Hash-Based Multilayer Scheduler for L7-Filter on a Highly Threaded Hierarchical Multi-Core Server ", 5th ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), Princeton, NJ, 2009. Paper

• Danhua Guo, Guangdeng Liao and Laxmi N. Bhuyan, "Performance Characterization and Cache-Aware Core Scheduling in a Virtualized Multi-Core Server under 10GbE", International Symposium on Workload Characterization (IISWC), Austin, TX, 2009. Paper

• Guangdeng Liao, Laxmi N. Bhuyan, "Performance Measurement of an Integrated NIC Architecture with 10GbE", Hot Interconnects (HOTI), 2009, New York. Paper

• Guangdeng Liao, Danhua Guo, Laxmi N. Bhuyan and Steve R. King. "Software Techniques to Improve Virtualized I/O on Multi-core Platforms", 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), San Jose, USA, 2008. Paper

• Danhua Guo, Guangdeng Liao, Laxmi N. Bhuyan and Jason Ding, " A Scalable Multithreaded L7-filter Design for Virtualized Multi-Core Servers", 4th ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), San Jose, USA, 2008. Paper

• Guangdeng Liao, Fang Liu and Yonghua Wu "Flow-sensitive Buffer Overrun Detection Based on Syntax Node", International Symposium on Communications and Information Technologies, 2005.
• Guangdeng Liao, Fang Liu and Ruonan Rao,"Syntax node-oriented buffer overrun detection", Journal of Software and application, 2006.
• Xiaowei Yang, Guangdeng Liao and Yueming Hu, "Performance tuning of Xen-based X86 Virtual Machine", Journal of Computer Engineering, 2006.

---

Patents 

• Ruonan Rao, Baiyan Li, Guangdeng Liao, Grid Service Delivery System, CN Patent, CN200510029658.6.
• Zhen Fang, Li Zhao, Ravi Iyer, Srihari Makineni, Guangdeng Liao, CIRCUITRY TO SELECT, AT LEAST IN PART, AT LEAST ONE MEMORY. US Pending Patent.

---

Industry Experience 

• I/O Architecture, Intel Labs, Hillsboro, USA Jun. 2010 - Sept. 2010
  

  Graduate Technical Intern, Advisor: Ted Willke

  Studied performance and power efficiency comparison of big Xeon cores and small Atom cores for cloud computing workloads.

  Modeled TCO of data centers and studied benefits of shared I/O subsystems for cloud computing workloads.

  Built up an atom-based cluster and analyzed I/O traffic (e.g. network, disk) of MapReduce apps on the cluster.

• Network Technology Lab, Intel Labs, Hillsboro, USA Jun. 2008 - Sept. 2008
  

  Graduate Technical Intern, Advisor: Ram Huggahulli

  Conducted extensive performance evaluation on a Sun Niagara 2 platform to study the performance impact of integrating a 10GbE network interface card into CPUs, and did an anatomized architectural analysis to fully understand the introduced benefits.

  Worked on the full system simulator SoftSDV to develop some cache features such as DMA invalidation, hardware prefetch and direct I/O etc.

  Got Outstanding evaluation on the summer internship and received the Intel Spontaneous Recognition Award.

• Network Technology Lab, Intel Labs, Hillsboro, USA Jun. 2007 - Sept. 2007
  

  Graduate Technical Intern, Advisor: Steve R. King

  Measured the performance of the virtualized system on Intel quad-core systems with 10GbE networking and designed a tool to do a life-of-packet analysis for virtualized packet processing.

  Designed a simplified Linux bridge to improve bridge performance which is used to do software packet switching for virtualized systems.

  Got Outstanding evaluation on the summer internship.

• System Software Group, Intel, Shanghai, China Mar. 2006 - Aug. 2006
  

  Software Engineer

  Ported a 2D driver for Intel integrated graphic cards (I965 chipset) and integrated it into X org 7.1 source tree efficiently.

  Modified Linux kernel components DRM and AGP to support the chipset and also developed the whole automatic build, run, analysis and report infrastructure.

  See the announcement here

• System Software Group, Intel, Shanghai, China Dec. 2002 - Mar. 2006
  

  Intern

  • Linux Kernel Enabling

    Did Linux kernel enabling for various Intel platforms

  • Real-time Posix Synchronization

    Designed the real time synchronization primitives (Mutex, Semaphore, Conditional Variable etc) based on Linux NPTL library. The new primitives have the new features of priority inheritance, priority protection, complex deadlock detection, real-time support and robustness.

    Coupling with the Linux kernel support, I implemented the new primitives Mutex, Semaphore, Conditional Variable in Glibc.

  • High Availability Cluster

    Designed and implemented the group communication layer for high available cluster, which is compliant to extended virtual synchrony.

    Designed and implemented the membership algorithm on the fundamental layer group communication layer.

    Prototype was announced here

  • Embedded System Development

    Developed a Watchdog device driver in a Xscale architecture and co-work with colleagues to port a Linux Kernel Debugger tool (KDB) to the Xscale architecture.

    Implemented a test framework, which automatically covers all Xscale instructions tests for the ported KDB. Won Intel OTC Group Award.

  ---

  Professional Activities 

  • TPC for GlobeCom 2011
  • TPC for IEEE Cluster 2011
  • TPC for CGC 2011
  • Reviewer for HPCA 2010
  • Reviewer for ANCS 2009, 2010
  • Reviewer for IEEE Transactions on Parallel and Distributed Systems
  • Reviewer for IEEE Transactions on Computer
  • Reviewer for ICS 2011
  • Reviewer for HPDC 2011
  • IEEE student member

  ---

  Technical Skills 

  • C, shell, Assembly Language etc.
  • Pthread programming, socket programming etc.
  • Linux kernel development, device driver development etc.
  
  

  [Education | [Research Interests | Publications | Patents | Industry Experience | CV | Courses | Professional Activities | Technical Skills | Life-of-packet] | Personal]

  ---