Tuning Environment for i8051 Synthesizable ModelNote: Archictectural power tool and instruction set power tool require Synopsis Design Compiler.
One of the defining characteristics of embedded systems is that they run one application for their entire execution time. This characteristic creates a great potential for optimizations. For example, a general purpose processor might have a datapath consisting of a register file, ALU, and a shifter. For an instruction such as a move, this datapath is expensive in terms of power because it must pass through the ALU and shifter before being written back into the register file. If this move operation was very common to a particular application, an optimization could be made by modifying the register file to move data from one location to another.
The information on this page describes an environment that simplifies
the process of tuning a microprocessor. Three main tools are provided in
order to analyze the power consumption of an 8051 microprocessor. The first
of these tools is an architectural view which generates a hierarchical display
of power consumption throughout the components of the processor. The output
is formatted so that it is readable by xdu, a graphical program for
displaying tree structures. The second tool calculates the average power
per instruction for the entire instruction set (several jump instructions have
not yet been implemented in this tool). The third tool is an instruction set
simulator which outputs a program memory view that displays the instruction,
power, and frequency for every address. It also provides a data memory view
that calculates accesses for each location in ram.
ExampleAfter running the initial version of the 8051, we obtained the following results:
The table below shows a small sample of the output of the instruction set power tool. The actual output shows results for all instructions excluding several jumps which have not been implemented yet.
(Small sample of instruction set power, all values are in mW)
The image below shows the output from the architectural view tool. It can be seen that U_RAM, U_ALU, U_CTR, and the buses for RAM and ROM are the most expensive components. Xdu allows you to explore this hierarchy in much more detail than is shown in the image.
(Architectural view tool output displayed in xdu, values are in 1/1000mW)
The table below displays output from the program memory view that is provided by the instruction set simulation tool. For every location in program memory, it displays the address, instruction, frequency of execution, average power, and power * frequency. This view makes it easy to determine which area of the program is the bottleneck in terms of power consumption.
(Small sample of program memory view, power is in mW)
A small sample of ram accesses are shown below. It is obvious in this that the example most frequently locations are the accumulator and psw.
(Small sample of ram location frequencies)
Installation Instructions(All files should be downloaded into the same directory)
1) Download i8051pwranalysis.tgz.
2) Download Xdu for graphical tree representations.
3) Download install.scr.
4) Run install.scr.
5) The sample output is located in the following locations:
Architectural view => ph_results/*.xdu
Instruction set power => inspower.txt
Program memory view => iss_results/*.pmp
Data memory view => iss_results/*.ram
Execution Instructions1) In order to run all tools and generate a report, run all.pl [version]. [Version] is used to print a version name on the generated report. All scripts are located in the i8051pwranalysis directory.
2) The xdu executable is in the xdu directory. It can be used on all files in the i8051pwranalysis directory that have a .xdu file extension.
3) Individual tools and scripts are described in detail at this link.