University of California
Dept. of Computer Science
Riverside, CA 92521
The 8051 is an 8-bit microprocessor originally designed in the 1980's by Intel that has gained great popularity since its introduction. Its standard form includes several standard on-chip peripherals, including timers, counters, and UART's, plus 4kbytes of on-chip program memory and 128 bytes (note: bytes, not Kbytes) of data memory, making single-chip implementations possible. Its hundreds of derivatives, manufactured by several different companies (like Philips) include even more on-chip peripherals, such as analog-digital converters, pulse-width modulators, I2C bus interfaces, etc. Costing only a few dollars per IC, the 8051 is estimated to be used in a large percentage (maybe 1/2?) all embedded system products.
The 8051 memory architecture includes 128 bytes of data memory that are accessible directly by its instructions. A 32-byte segment of this 128 byte memory block is bit addressable by a subset of the 8051 instructions, namely the bit-instructions. External memory of up to 64 Kbytes is accessable by a special "movx" instruction. Up to 4 Kbytes of program instructions can be stored in the internal memory of the 8051, or the 8051 can be configured to use up to 64 Kbytes of external program memory The majority of the 8051's instructions are executed within 12 clock cycles.
We developed a VHDL synthesizable model of the 8051 and a C++ based 8051 instruction-set simulator, both found below, on which we've based some research directions. One of those directions is a tuning environment, also found below, to assist a designer who wants to modify the 8051 architecture to be more power efficient for a particular program You see, a particular 8051 will probably execute the same program over and over for its lifetime, so it would be nice to orient the 8051 towards that program. We've also developed some new architectural features that can be used to lower the power of an 8051, which will appear on this page in the future.