Chen
Huang’s Home
Hi, my nam
e is Chen
Huang. I am a 5th year Phd student
in CSE
department of UC
Riverside.
I joined the embedded
system lab in
Jan, 2008. My advisor is Prof. Frank
Vahid.
My research interests are:
Embedded system design, especially FPGA Hardware/software
co-design
Software development and algorithm design
I am currently looking for a full
time job in
software development or
embedded system related areas. Here is my CV.
REASEARCH EXPERIENCE
1, Current project: Synthesis of Digital Mockups of Physical Systems.
2, A real- time face and eye detection on a Xilinx Virtex5 FPGA with better performance.
3, An event driven simulator written in C + + for Online Reconfigurable Architecture.
Beijing Univ. Posts and Telecom. Beijing, China, 2003~2007
1, A visual simulation of airport escorts scheduling written in VC + +.
2, Implemented a novel multi- path feedback Ad- hoc routing protocol using ns2.
3, Gobang game software with fine AI using VC#.
INTERN EXPERIENCE
Software dev. intern June 2011 - September 2011
I worked in Search/ Infrastructure team in Facebook.
Amazon.com Seattle, WA
Software engineer intern June 2010 - September 2010
I worked in Supply chain/ Inventory preplanning team in Amazon.
TEACHING EXPERIENCE
2007 fall, 2008
winter and 2009 spring
Teaching Assistant
for lab CS8 in UCR. (Introducing to computing)
2008 spring Teaching Assistant for lab CS10 in UCR. (Introducing to C++)
PUBLICATIONS
Journal:
network on FPGAs. Under submission.
C. Huang, F. Vahid, and T. Givargis A Custom FPGA Processor for Physical Model Ordinary Differential Equation
Solving, IEEE Embedded Systems Letters, Fall 2011 (to appear)
Conference:
C. Huang, F. Vahid Scalable Object Detection Accelerators on FPGAs Using Custom Design Space Exploration IEEE
Symposium on Application Specific Processors (SASP), June 2011, pp 115-121.
S. Sirowy, C. Huang, and F. Vahid. Online SystemC Emulation Acceleration. IEEE/ ACM Design Automation
Conference, June 2010.
C. Huang, F. Vahid. Server- Side Coprocessor Updating for Mobile Devices with FPGAs. ACM Symp. on FPGAs, Feb 2010.
S. Sirowy, C. Huang, and F. Vahid. Dynamic Acceleration Management for SystemC Emulation. Adaptive and
Reconfigurable Embedded Systems (APRES, part of ESWEEK), Oct 2009
C. Huang, F. Vahid. Transmuting Coprocessors: Dynamic Loading of FPGA Coprocessors. ACM IEEE Design Automation
Conference (DAC), 2009.
C. Huang, D. Sheldon, and F.
Vahid. Dynamic Tuning of Configurable Architectures:
The AWW Online
Algorithm.
IEEE/ACM
Int. Conf. on Hardware/Software Codesign and System
Synthesis, (CODES/ISSS), Oct 2008.
C. Huang and F. Vahid. Dynamic
Coprocessor Management for FPGA-Enhanced Compute
Platforms.
IEEE/ACM
Int.
Conf. on Compilers, Architectures, and Synthesis for
Embedded Systems (CASES),
Oct 2008.
CONTACT
Room 464, Engineering Building Unit 2
University of California,
Email: chuang at cs.ucr.edu