UCR EE/CS120B: Introduction to Embedded Systems, Spring 2004

Course Information Lecture Laboratory Homework Previous CS/EE120Bs Grades

EE/CS120B introduces the exciting and rapidly-growing field of embedded computing systems.

Why embedded systems?

Embedded computing systems are found everywhere, including in cellular telephones, pagers, VCRs, camcorders, thermostats, curbside rental-car check-in devices, automated supermarket stockers, computerized inventory control devices, digital thermometers, telephone answering machines, printers, portable video games, TV set-top boxes -- the list goes on. In 1997, the average U.S. household had over 10 embedded computers, not to mention the automobile, which have 35 or more by the year 2000. Demand for embedded system designers is large, and is growing rapidly. Many technical observers believe powerful ubiquitous embedded systems will create the next big revolution, just like the Internet did in the past.

In EE/CS120B, you'll learn how to develop and program basic embedded systems. It will introduce you to a unified view of hardware and software design, mapping desired functionality to a collection of single-purpose processors (digital hardware and peripherals) and general-purpose processors (microprocessors). Students will gain experience building real digital systems using VHDL, synthesis and FPGAs (Xilinx), and programming embedded microprocessors (Intel 8051 8-bit microcontroller). The follow-up courses of CS122A and CS122B introduce you to more advanced designs and methods.

Course information

Instructor	Brian Grattan, ( bgrattan@cs.ucr.edu), Office: SURGE Bldg. 340, Office hours: Tuesday 6:30-7:30, Thursday 4-5
Lecture	TR 5:10 - 6:30 PM Olmsted 1136
Lab	SURGE Bldg. 173
Textbooks	Embedded System Design: A Unified Hardware/Software Approach, Vahid and Givargis, Wiley & Sons, 2002, Book web page Logic and Computer Design Fundamentals, M. Morris Mano, Charles R. Kime, Prentice Hall, 2nd or 3rd Ed. Book Web page RECOMMENDED: The Students Guide to VHDL, Peter Ashenden, Morgan Kaufmann, 1st Edition, ISBN 1558605207. OR VHDL Design Representation and Synthesis, Gray Armstrong, Prentice Hall, Second edition, ISBN 0130216704. OR another VHDL book covering synthesis. Some free references include: Online VHDL tutorial and Hamburg VHDL archive which include Peter Ashenden's popular VHDL Cookbook. All students should have a basic C programming book. A good C book is The C Programming Language, Kernighan and Ritchie, Prentice Hall, ISBN 0-13-110362-8. An 8051 microcontroller book may be helpful for the lab. A good one is The 8051 Microcontroller, by Stewart and Miao, Prentice Hall, Second edition, ISBN 0-13-531948-x.
Software	We'll be using the Keil 8051 C compiler, Philips 8051 emulators/software, the Aldec VHDL simulator, and Xilinx/Synopsys Foundation Express. You may want to consider purchasing Aldec VHDL simulator student edition. It's an easy to use yet powerful VHDL simulator written for windows. You might also consider getting the Xilinx Student Edition Software and FPGA Board
TAs	Shawn Nematbakhsh( snematbakhsh@cs.ucr.edu), Wei Wu( wwu@cs.ucr.edu), Som Neema (sneema@cs.ucr.edu) Office hours: in lab
Prerequisite	CS/EE120A (Logic Design)
Mailing list	120B Mailing List: It is your responsibility to subscribe to the mailing list, which requires a UCR email address. Some announcements may made only over the mailing list. If you commonly read email from another address (e.g., yahoo or hotmail), you might then create a .forward file (containing your other email address) in your UCR account to forward the emails.
Grade	Lab component 40% (lab assignments, lab attendance, in-lab exams), Lecture component 60% (homeworks 10%, quizzes 10%, Midterm 20%, Final 20%) Note: To ensure minimum competency in both the principles and practice, you must pass both components to pass the course. Grades will be assigned using a conventional grading scale: 100-90 A, 89-80 B, 79-70 C, 69-60 D, 59-0 F. +/- grades will be given. Students are NOT competing against one another, but rather against the scale -- all students can get good grades if all do well. We may adjust ("curve") an individual assessment item if such adjusting HELPS the class. Our goal is to help as many of you as possible to do well.

Lecture topics

(LCDF: Logic and Computer Design Fundamentals; ESD: Embedded System Design book); Lecture slides are available from the ESD web site

(Students should review Chapters 1-5 in LCDF)

Week 1: Introduction to embedded systems (ESD 1)
HK1

Week 2: Custom single-purpose processors: Hardware (ESD 2), Sequential Logic Design (LCDF 4)
Quiz 1
HK2

Week 3: Custom single-purpose processors (continued)
Quiz 2

Week 4: General-purpose processors continued (ESD 3), ASM programming, 8051 overview
HK3

Week 5: Midterm (Thursday)
Standard Single-purpose processors: Peripherals (ESD 4)

Week 6: Standard single-purpose processors continued
Memory (ESD 5) (skip advanced RAMs)
HK4

Week 7: Memory (cont)
Quiz 3

Week 8: Interfacing (ESD 6)
HK5

Week 9: Interfacing (cont)
Putting it all together -- a digital camera (ESD 7)
Quiz 4

Week 10: Digital camera (cont)
Misc.

FINAL, Click here for final schedule Location: OLMH 1136

Lecture Slides:

March 29, 2004

April 1, 2004

April 6, 2004

April 8, 2004

April 13, 2004 (updated)

April 15, 2004

April 20, 2004

April 22, 2004

April 27, 2004

May 04, 2004 (updated)

May 06, 2004

May 11, 2004

May 13, 2004

May 18, 2004

May 20, 2004

May 25, 2004

May 27, 2004

June 1, 2004

June 3, 2004

General course features and policies

Material covered: You'll be responsible for learning material covered in lecture, in the textbook, and in lab. We expect you to read the textbook; lecture only emphasizes key material, but does not cover all required material alone.
Collaboration policy (TA/instructor may override for particular assignment):
- Midterm, final, quizzes, lab practical -- Obviously no collaboration
- Homeworks -- Collaboration strongly ENCOURAGED. Study groups are great -- they can enhance learning, and help with your people skills (contrary to stereotypes, engineering is a very social discipline). You should still do your own solution, and should not turn in identical solutions as others, but similar solutions are O.K. Remember though -- these are designed to help you on the assesment items, so relying too heavily on others will hurt you during assessment. Also, we may give homework problems whose answers can be found online. That's so you get quick feedback; you should submit your own answers, not merely copies of the available answers.
- Labs -- Collaboration strongly ENCOURAGED. If you complete a lab, feel free to help others -- teaching enhances your own learning. However, bear in mind that submissions must represent YOUR OWN original work. Sharing code or team-coding are not allowed. Copying code from ANY source (any book, current or past students, past solutions, etc.) is not allowed. Collaboration may consist of discussing the general approach to solving the problem, but should not involve communicating in code or even pseudo-code. Students may help others find bugs. Your code must be unique -- the odds of randomly obtained highly-similar code is very low. Computing, like surgery or driving a car or playing golf, can only be learned by doing it yourself!
Academic dishonesty: Please don't cheat, O.K.? Detected cheating will be punished. Report cheating anonymously at: https://www.cs.ucr.edu/cheating/. Note: we keep all submissions online, even from past quarters, and can compare submissions using automated tools. Be aware that exams are photocopied, in part for comparison with exams submitted for regrades. Also, be aware that lying to an instructor in order to be able to make up a missed exam or in other ways to obtain a better grade can be treated as academic dishonesty. During exams, cell phones and PDAs must be stored away in a place not visible (e.g., inside a backpack).
Regrade policy: regrade requests must be submitted in writing and within one week of the distribution of the graded material. Grade-database errors should also be pointed out within one week of posting.
Communicating with the instructors and TAs: when sending electronic mail to the instructors or TAs, please remember that many students have the same name, and your instructor may be teaching other courses too. So please give your full name and list the course you are referring to, and preferably include your student ID number. We prefer that you use your UCR email account so that you get used to it (remember that UCR sends many official notices now only by email). Please try to be polite and professional, and use reasonable grammar and formatting.
Cell phones: During lectures and lab sessions, please turn off your cell phone.
Lab attendance : is required for the full 3-hour lab. If you finish early, help others (teaching increases your own learning), read ahead, work on your at-home program assignments, etc.
Lab enrollment : To reduce disruptions and provide for the best educational environment, all persons in lab during scheduled lab time should be formally registered in that section. In general, no swapping sections and no unregistered people in the lab are allowed, even if there are extra computers.
Time Requirements: This is a five-unit CS/EE course. As such, you should expect to spend 3 hours/week in lecture, 6 hours/week in lab, and about 6 hours/week doing individual study (readings, homeworks, programming, lab preparation, etc). Please don't underestimate the time you will need to spend on this course. These are real time amounts spent by successful past students. Computer Science and Engineering are challenging disciplines requiring extensive time to master -- it's worth it in the end (great jobs, great pay, respect, etc.), but those things don't come for free. So practice, practice, practice! Work hard in school, then reap the rewards of a great career.
Final grades: Per university policy, changes to your final grade will be made only in the event of a clerical error. Asking your instructor how far you were from a cutoff and what extra work you can do to improve the grade is not appropriate.
No late homeworks. Submitted homeworks should be legible. You may want to do a draft of the homework, and then create a neater copy to turn in.
Quizzes and midterms from past quarters are online (see Previous CS/EE120Bs). We put them there so you can practice -- make good use of them!

Homeworks

Homework 1: Due Thr, Apr. 8 (Solutions)

Homework 2: Due Thr. Apr. 15 (Solutions)

Homework 3: Due Tues., Apr. 27 (Solutions)

Extra Credit: Due May 20

Homework 4: Due Thr., May 13 (Solutions)

Homework 5: Due Thr., May 27 (Solutions)

Lab

Lab topics

Introduction to VHDL and simulation

Introduction to synthesis and FPGAs ( Xilinx )

Synthesis of digital components, datapaths, and simple custom processors

Introduction to an embedded microprocessor: The Intel 8051

Hardware/software tradeoffs

Lab features and policies

Labs should be done with one partner.

Each lab assignment's grade will typically consist 100 points: 30 points for your lab demo (simulation and board), 50 points for your code and/or schematic (must be well organized and commented), and 20 points for your lab report.

Lab reports are due at the time of the demo. You are to print out report, code, schematic, and result and hand your TA a hardcopy at the time of the demo. Use the report form (in plain text, .doc, .pdf, .rtf or .ps please). Late lab reports will lose points.

Lab reports, code and results (preferably NOT zipped) should also be turned in through the web at the time of the demo.

The TA's may not be available for help 15 minutes before the end of each lab. This time is reserved for checking out completed labs.

You will be working in groups of two. You are welcome to choose your own lab partner. Groups of three will not be allowed.

The TA's will check out the Xilinx boards and other equipment to each group when required. Boards are only available during scheduled lab. Student must check the boards back in when done, and must be sure to sign the check in sheet. Students should also be sure the TA records the score of your lab demo.

The Xilinx boards are pre-wired. Please do not change any wiring unless specifically instructed by the TA. Students may be held responsible for boards damaged due to misuse.

You are required to go to the lab section you are registered in. If you wish to change your lab section, this must be pre-approved by the TA.

The key to a successful and enjoyable lab experience is to prepare extensively before coming to lab. Xilinx software comes with the Wakerly book, and VHDL simulation software can be purchased inexpensively. You should code most of your VHDL and C before coming to lab. Lab time is for testing things out and experimenting.

LAB SCHEDULE

Lab Report Format

Grades

GRADES
Grades on Final Exam
Final Grades

UCR EE/CS120B: Introduction to Embedded Systems, Spring 2004

Course Information Lecture Laboratory Homework Previous CS/EE120Bs Grades

Why embedded systems?

Course information

Lecture topics

General course features and policies

Homeworks

Quizzes

Midterm

Final

Lab

Lab topics

Grades

Anonymous evaluation form

Other links